Year No. Offer Mode Description Cred. Pts 96 70425 S12 X ELECTRONIC ENGINEERING II 1.00
70325 or E2002
Familiarity with electronic devices and circuits is fundamental to electrical engineeing. The material covered here will further develop both in breadth and depth that which was covered in the preceding units, with a significant emphasis on developing design skills. Topics to be covered will include : semiconductor devices (discrete and integrated), logic families, multistage amplifiers, operational amplifiers, active filters, negative and positive feedback, oscillators, power supplies and selected circuits used in communication systems.
After successfully completing this unit, a student will be able to :
Description Weighting(%)
- Semiconductors 10.00
- Logic circuits 10.00
- Amplifiers 20.00
- Operational amplifiers 15.00
- Power supplies 15.00
- Feedback 15.00
- Communications systems 10.00
- Miscellaneous 5.00
Hand tools : 1 pair small pliers (smooth jaw), 1 pair wire
cutter/strippers.
Circuit Prototyping Breadboard.
Non programmable scientific calculator.
Roden M S, Student Edition of Micro CAP IV, Electronic Circuit
Analysis Program.
Integrated Circuit Manufacturers Databooks.
ACTIVITY HOURS Project Work 40 Report Writing 15 Residential School 12 Directed Study 57 Private Study 33 Examinations 3 Assessments 15
No *F/S Marks Due Description Wtg(%) LBL 1 S 20.00 22/03/96 CML ASSIGNMENT 1 2.00 Y 2 S 150.00 29/03/96 ASSIGNMENT 1 15.00 Y 3 S 20.00 03/05/96 CML ASSIGNMENT 2 2.00 Y 4 F 10/05/96 DESIGN ASSIGNMENT 1 Y 5 S 20.00 26/07/96 CML ASSIGNMENT 3 2.00 Y 6 F 26/07/96 DESIGN ASSIGNMENT 2 Y 7 S 20.00 16/08/96 CML ASSIGNMENT 4 2.00 Y 8 S 20.00 13/09/96 CML ASSIGNMENT 5 2.00 Y 9 S 150.00 13/09/96 ASSIGNMENT 2 15.00 Y 10 S 600.00 END S2 3 HOUR EXAMINATION 60.00 N
1 In order to successfully complete the unit, students must
normally obtain, in aggregate, 50 percent of the total marks
allocated. In addition, students must achieve at least 50
percent of the marks allocated in each of the examination, the
assignments, the CML and the residential schools.
2 Attendance at residential school is compulsory.
3 Because it is normal practice to release model answers promptly
after the due date, the penalty for late submission of assignment
work will normally be the loss of all marks for the assignment,
unless prior arrangements are agreed to by the examiner.
4 The examination in this unit consists of two parts. Part A is
worth 50% of the total examination and is OPEN BOOK. Part B is
worth 50% of the total examination and is RESTRICTED; only the
student's own handwritten notes and writing materials are
permitted.
5 A grade of HD, A or B will be awarded to students achieving
overall percentages of approximately 90, 80 or 65 respectively,
provided no one of their scores for the examination, the combined
CML assignments and the combined assignments 1 to 5 is
significantly below this same level.
6 It is the policy of the Faculty of Engineering and Surveying NOT
to accept submission of assignments by facsimile or email.
Students in remote locations who do not have regular access to
postal services may be given special consideration.